Merging upstream version 0.7.1 (Closes: #991419).
Signed-off-by: Daniel Baumann <daniel@debian.org>
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99 changed files with 6727 additions and 943 deletions
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@ -45,15 +45,9 @@
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/* Minimum requirements for the CK_PR interface are met. */
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#define CK_F_PR
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#ifdef CK_MD_UMP
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#define CK_PR_LOCK_PREFIX
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#else
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#define CK_PR_LOCK_PREFIX "lock "
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#endif
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/*
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* Prevent speculative execution in busy-wait loops (P4 <=)
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* or "predefined delay".
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* Prevent speculative execution in busy-wait loops (P4 <=) or "predefined
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* delay".
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*/
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CK_CC_INLINE static void
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ck_pr_stall(void)
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@ -62,28 +56,52 @@ ck_pr_stall(void)
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return;
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}
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#ifdef CK_MD_UMP
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#define CK_PR_LOCK_PREFIX
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#define CK_PR_FENCE(T, I) \
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CK_CC_INLINE static void \
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ck_pr_fence_strict_##T(void) \
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{ \
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__asm__ __volatile__("" ::: "memory"); \
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return; \
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}
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#else
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#define CK_PR_LOCK_PREFIX "lock "
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#define CK_PR_FENCE(T, I) \
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CK_CC_INLINE static void \
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ck_pr_fence_strict_##T(void) \
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{ \
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__asm__ __volatile__(I ::: "memory"); \
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return; \
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}
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#endif /* CK_MD_UMP */
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CK_PR_FENCE(atomic, "sfence")
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CK_PR_FENCE(atomic_store, "sfence")
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CK_PR_FENCE(atomic_load, "mfence")
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CK_PR_FENCE(store_atomic, "sfence")
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CK_PR_FENCE(load_atomic, "mfence")
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CK_PR_FENCE(load, "lfence")
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CK_PR_FENCE(load_store, "mfence")
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CK_PR_FENCE(store, "sfence")
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CK_PR_FENCE(store_load, "mfence")
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CK_PR_FENCE(memory, "mfence")
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CK_PR_FENCE(release, "mfence")
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CK_PR_FENCE(acquire, "mfence")
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CK_PR_FENCE(acqrel, "mfence")
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CK_PR_FENCE(lock, "mfence")
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CK_PR_FENCE(unlock, "mfence")
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#if defined(CK_MD_SSE_DISABLE)
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/* If SSE is disabled, then use atomic operations for serialization. */
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#define CK_MD_X86_MFENCE "lock addl $0, (%%esp)"
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#define CK_MD_X86_SFENCE CK_MD_X86_MFENCE
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#define CK_MD_X86_LFENCE CK_MD_X86_MFENCE
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#else
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#define CK_MD_X86_SFENCE "sfence"
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#define CK_MD_X86_LFENCE "lfence"
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#define CK_MD_X86_MFENCE "mfence"
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#endif /* !CK_MD_SSE_DISABLE */
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CK_PR_FENCE(atomic, "")
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CK_PR_FENCE(atomic_store, "")
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CK_PR_FENCE(atomic_load, "")
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CK_PR_FENCE(store_atomic, "")
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CK_PR_FENCE(load_atomic, "")
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CK_PR_FENCE(load, CK_MD_X86_LFENCE)
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CK_PR_FENCE(load_store, CK_MD_X86_MFENCE)
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CK_PR_FENCE(store, CK_MD_X86_SFENCE)
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CK_PR_FENCE(store_load, CK_MD_X86_MFENCE)
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CK_PR_FENCE(memory, CK_MD_X86_MFENCE)
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CK_PR_FENCE(release, CK_MD_X86_MFENCE)
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CK_PR_FENCE(acquire, CK_MD_X86_MFENCE)
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CK_PR_FENCE(acqrel, CK_MD_X86_MFENCE)
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CK_PR_FENCE(lock, CK_MD_X86_MFENCE)
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CK_PR_FENCE(unlock, CK_MD_X86_MFENCE)
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#undef CK_PR_FENCE
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@ -215,18 +233,18 @@ CK_PR_FAA_S(8, uint8_t, "xaddb")
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}
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#define CK_PR_UNARY_V(K, S, T, C, I) \
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CK_CC_INLINE static void \
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ck_pr_##K##_##S##_zero(T *target, bool *r) \
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CK_CC_INLINE static bool \
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ck_pr_##K##_##S##_is_zero(T *target) \
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{ \
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bool ret; \
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__asm__ __volatile__(CK_PR_LOCK_PREFIX I " %0; setz %1" \
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: "+m" (*(C *)target), \
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"=m" (*r) \
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"=qm" (ret) \
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: \
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: "memory", "cc"); \
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return; \
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return ret; \
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}
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#define CK_PR_UNARY_S(K, S, T, I) CK_PR_UNARY(K, S, T, T, I)
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#define CK_PR_GENERATE(K) \
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@ -289,8 +307,38 @@ CK_PR_GENERATE(xor)
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#undef CK_PR_BINARY
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/*
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* Atomic compare and swap.
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* Atomic compare and swap, with a variant that sets *v to the old value of target.
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*/
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#ifdef __GCC_ASM_FLAG_OUTPUTS__
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#define CK_PR_CAS(S, M, T, C, I) \
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CK_CC_INLINE static bool \
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ck_pr_cas_##S(M *target, T compare, T set) \
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{ \
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bool z; \
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__asm__ __volatile__(CK_PR_LOCK_PREFIX I " %3, %0" \
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: "+m" (*(C *)target), \
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"=@ccz" (z), \
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/* RAX is clobbered by cmpxchg. */ \
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"+a" (compare) \
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: "q" (set) \
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: "memory", "cc"); \
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return z; \
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} \
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\
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CK_CC_INLINE static bool \
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ck_pr_cas_##S##_value(M *target, T compare, T set, M *v) \
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{ \
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bool z; \
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__asm__ __volatile__(CK_PR_LOCK_PREFIX I " %3, %0;" \
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: "+m" (*(C *)target), \
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"=@ccz" (z), \
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"+a" (compare) \
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: "q" (set) \
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: "memory", "cc"); \
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*(T *)v = compare; \
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return z; \
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}
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#else
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#define CK_PR_CAS(S, M, T, C, I) \
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CK_CC_INLINE static bool \
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ck_pr_cas_##S(M *target, T compare, T set) \
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@ -303,7 +351,23 @@ CK_PR_GENERATE(xor)
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"a" (compare) \
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: "memory", "cc"); \
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return z; \
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} \
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\
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CK_CC_INLINE static bool \
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ck_pr_cas_##S##_value(M *target, T compare, T set, M *v) \
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{ \
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bool z; \
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__asm__ __volatile__(CK_PR_LOCK_PREFIX I " %3, %0;" \
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"setz %1;" \
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: "+m" (*(C *)target), \
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"=q" (z), \
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"+a" (compare) \
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: "q" (set) \
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: "memory", "cc"); \
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*(T *)v = compare; \
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return z; \
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}
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#endif
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CK_PR_CAS(ptr, void, void *, char, "cmpxchgl")
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@ -319,41 +383,6 @@ CK_PR_CAS_S(8, uint8_t, "cmpxchgb")
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#undef CK_PR_CAS_S
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#undef CK_PR_CAS
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/*
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* Compare and swap, set *v to old value of target.
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*/
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#define CK_PR_CAS_O(S, M, T, C, I, R) \
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CK_CC_INLINE static bool \
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ck_pr_cas_##S##_value(M *target, T compare, T set, M *v) \
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{ \
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bool z; \
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__asm__ __volatile__(CK_PR_LOCK_PREFIX "cmpxchg" I " %3, %0;" \
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"mov %% " R ", %2;" \
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"setz %1;" \
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: "+m" (*(C *)target), \
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"=a" (z), \
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"=m" (*(C *)v) \
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: "q" (set), \
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"a" (compare) \
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: "memory", "cc"); \
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return (bool)z; \
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}
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CK_PR_CAS_O(ptr, void, void *, char, "l", "eax")
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#define CK_PR_CAS_O_S(S, T, I, R) \
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CK_PR_CAS_O(S, T, T, T, I, R)
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CK_PR_CAS_O_S(char, char, "b", "al")
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CK_PR_CAS_O_S(int, int, "l", "eax")
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CK_PR_CAS_O_S(uint, unsigned int, "l", "eax")
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CK_PR_CAS_O_S(32, uint32_t, "l", "eax")
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CK_PR_CAS_O_S(16, uint16_t, "w", "ax")
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CK_PR_CAS_O_S(8, uint8_t, "b", "al")
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#undef CK_PR_CAS_O_S
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#undef CK_PR_CAS_O
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/*
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* Atomic bit test operations.
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*/
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