1
0
Fork 0

Adding upstream version 1.65.7.

Signed-off-by: Daniel Baumann <daniel@debian.org>
This commit is contained in:
Daniel Baumann 2025-05-19 21:29:57 +02:00
parent 5189956325
commit 32b8eb3fd7
Signed by: daniel
GPG key ID: FBB4F0E80A80222F
4153 changed files with 2487292 additions and 0 deletions

View file

@ -0,0 +1,39 @@
#ifndef __CCGO__
#define FLT_EVAL_METHOD 0
#define LDBL_TRUE_MIN 6.47517511943802511092443895822764655e-4966L
#define LDBL_MIN 3.36210314311209350626267781732175260e-4932L
#define LDBL_MAX 1.18973149535723176508575932662800702e+4932L
#define LDBL_EPSILON 1.92592994438723585305597794258492732e-34L
#define LDBL_MANT_DIG 113
#define LDBL_MIN_EXP (-16381)
#define LDBL_MAX_EXP 16384
#define LDBL_DIG 33
#define LDBL_MIN_10_EXP (-4931)
#define LDBL_MAX_10_EXP 4932
#define DECIMAL_DIG 36
#else // __CCGO__
#define FLT_EVAL_METHOD 0
#define LDBL_TRUE_MIN 4.94065645841246544177e-324L
#define LDBL_MIN 2.22507385850720138309e-308L
#define LDBL_MAX 1.79769313486231570815e+308L
#define LDBL_EPSILON 2.22044604925031308085e-16L
#define LDBL_MANT_DIG 53
#define LDBL_MIN_EXP (-1021)
#define LDBL_MAX_EXP 1024
#define LDBL_DIG 15
#define LDBL_MIN_10_EXP (-307)
#define LDBL_MAX_10_EXP 308
#define DECIMAL_DIG 17
#endif // __CCGO__

View file

@ -0,0 +1 @@

View file

@ -0,0 +1,15 @@
static inline uintptr_t __get_tp();
#ifndef __CCGO__
static inline uintptr_t __get_tp()
{
uintptr_t tp;
__asm__ ("mrs %0,tpidr_el0" : "=r"(tp));
return tp;
}
#endif
#define TLS_ABOVE_TP
#define GAP_ABOVE_TP 16
#define MC_PC pc

View file

@ -0,0 +1,90 @@
#define __SYSCALL_LL_E(x) (x)
#define __SYSCALL_LL_O(x) (x)
static __inline long __syscall0(long n);
static __inline long __syscall1(long n, long a1);
static __inline long __syscall2(long n, long a1, long a2);
static __inline long __syscall3(long n, long a1, long a2, long a3);
static __inline long __syscall4(long n, long a1, long a2, long a3, long a4);
static __inline long __syscall5(long n, long a1, long a2, long a3, long a4, long a5);
static __inline long __syscall6(long n, long a1, long a2, long a3, long a4, long a5, long a6);
#ifndef __CCGO__
#define __asm_syscall(...) do { \
__asm__ __volatile__ ( "svc 0" \
: "=r"(x0) : __VA_ARGS__ : "memory", "cc"); \
return x0; \
} while (0)
static inline long __syscall0(long n)
{
register long x8 __asm__("x8") = n;
register long x0 __asm__("x0");
__asm_syscall("r"(x8));
}
static inline long __syscall1(long n, long a)
{
register long x8 __asm__("x8") = n;
register long x0 __asm__("x0") = a;
__asm_syscall("r"(x8), "0"(x0));
}
static inline long __syscall2(long n, long a, long b)
{
register long x8 __asm__("x8") = n;
register long x0 __asm__("x0") = a;
register long x1 __asm__("x1") = b;
__asm_syscall("r"(x8), "0"(x0), "r"(x1));
}
static inline long __syscall3(long n, long a, long b, long c)
{
register long x8 __asm__("x8") = n;
register long x0 __asm__("x0") = a;
register long x1 __asm__("x1") = b;
register long x2 __asm__("x2") = c;
__asm_syscall("r"(x8), "0"(x0), "r"(x1), "r"(x2));
}
static inline long __syscall4(long n, long a, long b, long c, long d)
{
register long x8 __asm__("x8") = n;
register long x0 __asm__("x0") = a;
register long x1 __asm__("x1") = b;
register long x2 __asm__("x2") = c;
register long x3 __asm__("x3") = d;
__asm_syscall("r"(x8), "0"(x0), "r"(x1), "r"(x2), "r"(x3));
}
static inline long __syscall5(long n, long a, long b, long c, long d, long e)
{
register long x8 __asm__("x8") = n;
register long x0 __asm__("x0") = a;
register long x1 __asm__("x1") = b;
register long x2 __asm__("x2") = c;
register long x3 __asm__("x3") = d;
register long x4 __asm__("x4") = e;
__asm_syscall("r"(x8), "0"(x0), "r"(x1), "r"(x2), "r"(x3), "r"(x4));
}
static inline long __syscall6(long n, long a, long b, long c, long d, long e, long f)
{
register long x8 __asm__("x8") = n;
register long x0 __asm__("x0") = a;
register long x1 __asm__("x1") = b;
register long x2 __asm__("x2") = c;
register long x3 __asm__("x3") = d;
register long x4 __asm__("x4") = e;
register long x5 __asm__("x5") = f;
__asm_syscall("r"(x8), "0"(x0), "r"(x1), "r"(x2), "r"(x3), "r"(x4), "r"(x5));
}
#define VDSO_USEFUL
#define VDSO_CGT_SYM "__kernel_clock_gettime"
#define VDSO_CGT_VER "LINUX_2.6.39"
#endif // __CCGO__
#define IPC_64 0

View file

@ -0,0 +1,139 @@
#include "libc.h"
#if __ARM_ARCH_4__ || __ARM_ARCH_4T__ || __ARM_ARCH == 4
#define BLX "mov lr,pc\n\tbx"
#else
#define BLX "blx"
#endif
extern hidden uintptr_t __a_cas_ptr, __a_barrier_ptr;
#if ((__ARM_ARCH_6__ || __ARM_ARCH_6K__ || __ARM_ARCH_6KZ__ || __ARM_ARCH_6ZK__) && !__thumb__) \
|| __ARM_ARCH_6T2__ || __ARM_ARCH_7A__ || __ARM_ARCH_7R__ || __ARM_ARCH >= 7
#define a_ll a_ll
static inline int a_ll(volatile int *p)
#ifndef __CCGO__
{
int v;
__asm__ __volatile__ ("ldrex %0, %1" : "=r"(v) : "Q"(*p));
return v;
}
#else
;
#endif
#define a_sc a_sc
static inline int a_sc(volatile int *p, int v)
#ifndef __CCGO__
{
int r;
__asm__ __volatile__ ("strex %0,%2,%1" : "=&r"(r), "=Q"(*p) : "r"(v) : "memory");
return !r;
}
#else
;
#endif
#if __ARM_ARCH_7A__ || __ARM_ARCH_7R__ || __ARM_ARCH >= 7
#define a_barrier a_barrier
static inline void a_barrier()
#ifndef __CCGO__
{
__asm__ __volatile__ ("dmb ish" : : : "memory");
}
#else
;
#endif
#endif
#define a_pre_llsc a_barrier
#define a_post_llsc a_barrier
#else
#define a_cas a_cas
static inline int a_cas(volatile int *p, int t, int s)
#ifndef __CCGO__
{
for (;;) {
register int r0 __asm__("r0") = t;
register int r1 __asm__("r1") = s;
register volatile int *r2 __asm__("r2") = p;
register uintptr_t r3 __asm__("r3") = __a_cas_ptr;
int old;
__asm__ __volatile__ (
BLX " r3"
: "+r"(r0), "+r"(r3) : "r"(r1), "r"(r2)
: "memory", "lr", "ip", "cc" );
if (!r0) return t;
if ((old=*p)!=t) return old;
}
}
#else
;
#endif
#endif
#ifndef a_barrier
#define a_barrier a_barrier
static inline void a_barrier()
#ifndef __CCGO__
{
register uintptr_t ip __asm__("ip") = __a_barrier_ptr;
__asm__ __volatile__( BLX " ip" : "+r"(ip) : : "memory", "cc", "lr" );
}
#else
;
#endif
#endif
#define a_crash a_crash
static inline void a_crash()
#ifndef __CCGO__
{
__asm__ __volatile__(
#ifndef __thumb__
".word 0xe7f000f0"
#else
".short 0xdeff"
#endif
: : : "memory");
}
#else
;
#endif
#if __ARM_ARCH >= 5 && (!__thumb__ || __thumb2__)
#define a_clz_32 a_clz_32
static inline int a_clz_32(uint32_t x)
#ifndef __CCGO__
{
__asm__ ("clz %0, %1" : "=r"(x) : "r"(x));
return x;
}
#else
;
#endif
#if __ARM_ARCH_6T2__ || __ARM_ARCH_7A__ || __ARM_ARCH_7R__ || __ARM_ARCH >= 7
#define a_ctz_32 a_ctz_32
static inline int a_ctz_32(uint32_t x)
#ifndef __CCGO__
{
uint32_t xr;
__asm__ ("rbit %0, %1" : "=r"(xr) : "r"(x));
return a_clz_32(xr);
}
#else
;
#endif
#endif
#endif

View file

@ -0,0 +1,16 @@
#define FLT_EVAL_METHOD 0
#define LDBL_TRUE_MIN 4.94065645841246544177e-324L
#define LDBL_MIN 2.22507385850720138309e-308L
#define LDBL_MAX 1.79769313486231570815e+308L
#define LDBL_EPSILON 2.22044604925031308085e-16L
#define LDBL_MANT_DIG 53
#define LDBL_MIN_EXP (-1021)
#define LDBL_MAX_EXP 1024
#define LDBL_DIG 15
#define LDBL_MIN_10_EXP (-307)
#define LDBL_MAX_10_EXP 308
#define DECIMAL_DIG 17

View file

@ -0,0 +1,36 @@
static inline uintptr_t __get_tp();
#ifndef __CCGO__
#if ((__ARM_ARCH_6K__ || __ARM_ARCH_6KZ__ || __ARM_ARCH_6ZK__) && !__thumb__) \
|| __ARM_ARCH_7A__ || __ARM_ARCH_7R__ || __ARM_ARCH >= 7
static inline uintptr_t __get_tp()
{
uintptr_t tp;
__asm__ ( "mrc p15,0,%0,c13,c0,3" : "=r"(tp) );
return tp;
}
#else
#if __ARM_ARCH_4__ || __ARM_ARCH_4T__ || __ARM_ARCH == 4
#define BLX "mov lr,pc\n\tbx"
#else
#define BLX "blx"
#endif
static inline uintptr_t __get_tp()
{
extern hidden uintptr_t __a_gettp_ptr;
register uintptr_t tp __asm__("r0");
__asm__ ( BLX " %1" : "=r"(tp) : "r"(__a_gettp_ptr) : "cc", "lr" );
return tp;
}
#endif
#endif
#define TLS_ABOVE_TP
#define GAP_ABOVE_TP 8
#define MC_PC arm_pc

View file

@ -0,0 +1,127 @@
#ifdef __CCGO__
static __inline long __syscall0(long n);
static __inline long __syscall1(long n, long a1);
static __inline long __syscall2(long n, long a1, long a2);
static __inline long __syscall3(long n, long a1, long a2, long a3);
static __inline long __syscall4(long n, long a1, long a2, long a3, long a4);
static __inline long __syscall5(long n, long a1, long a2, long a3, long a4, long a5);
static __inline long __syscall6(long n, long a1, long a2, long a3, long a4, long a5, long a6);
#define __SYSCALL_LL_E(x) ((int)(x)), ((int)((x)>>32))
#define __SYSCALL_LL_O(x) 0, __SYSCALL_LL_E((x))
#else // __CCGO__
#define __SYSCALL_LL_E(x) \
((union { long long ll; long l[2]; }){ .ll = x }).l[0], \
((union { long long ll; long l[2]; }){ .ll = x }).l[1]
#define __SYSCALL_LL_O(x) 0, __SYSCALL_LL_E((x))
#ifdef __thumb__
/* Avoid use of r7 in asm constraints when producing thumb code,
* since it's reserved as frame pointer and might not be supported. */
#define __ASM____R7__
#define __asm_syscall(...) do { \
__asm__ __volatile__ ( "mov %1,r7 ; mov r7,%2 ; svc 0 ; mov r7,%1" \
: "=r"(r0), "=&r"((int){0}) : __VA_ARGS__ : "memory"); \
return r0; \
} while (0)
#else
#define __ASM____R7__ __asm__("r7")
#define __asm_syscall(...) do { \
__asm__ __volatile__ ( "svc 0" \
: "=r"(r0) : __VA_ARGS__ : "memory"); \
return r0; \
} while (0)
#endif
/* For thumb2, we can allow 8-bit immediate syscall numbers, saving a
* register in the above dance around r7. Does not work for thumb1 where
* only movs, not mov, supports immediates, and we can't use movs because
* it doesn't support high regs. */
#ifdef __thumb2__
#define R7_OPERAND "rI"(r7)
#else
#define R7_OPERAND "r"(r7)
#endif
static inline long __syscall0(long n)
{
register long r7 __ASM____R7__ = n;
register long r0 __asm__("r0");
__asm_syscall(R7_OPERAND);
}
static inline long __syscall1(long n, long a)
{
register long r7 __ASM____R7__ = n;
register long r0 __asm__("r0") = a;
__asm_syscall(R7_OPERAND, "0"(r0));
}
static inline long __syscall2(long n, long a, long b)
{
register long r7 __ASM____R7__ = n;
register long r0 __asm__("r0") = a;
register long r1 __asm__("r1") = b;
__asm_syscall(R7_OPERAND, "0"(r0), "r"(r1));
}
static inline long __syscall3(long n, long a, long b, long c)
{
register long r7 __ASM____R7__ = n;
register long r0 __asm__("r0") = a;
register long r1 __asm__("r1") = b;
register long r2 __asm__("r2") = c;
__asm_syscall(R7_OPERAND, "0"(r0), "r"(r1), "r"(r2));
}
static inline long __syscall4(long n, long a, long b, long c, long d)
{
register long r7 __ASM____R7__ = n;
register long r0 __asm__("r0") = a;
register long r1 __asm__("r1") = b;
register long r2 __asm__("r2") = c;
register long r3 __asm__("r3") = d;
__asm_syscall(R7_OPERAND, "0"(r0), "r"(r1), "r"(r2), "r"(r3));
}
static inline long __syscall5(long n, long a, long b, long c, long d, long e)
{
register long r7 __ASM____R7__ = n;
register long r0 __asm__("r0") = a;
register long r1 __asm__("r1") = b;
register long r2 __asm__("r2") = c;
register long r3 __asm__("r3") = d;
register long r4 __asm__("r4") = e;
__asm_syscall(R7_OPERAND, "0"(r0), "r"(r1), "r"(r2), "r"(r3), "r"(r4));
}
static inline long __syscall6(long n, long a, long b, long c, long d, long e, long f)
{
register long r7 __ASM____R7__ = n;
register long r0 __asm__("r0") = a;
register long r1 __asm__("r1") = b;
register long r2 __asm__("r2") = c;
register long r3 __asm__("r3") = d;
register long r4 __asm__("r4") = e;
register long r5 __asm__("r5") = f;
__asm_syscall(R7_OPERAND, "0"(r0), "r"(r1), "r"(r2), "r"(r3), "r"(r4), "r"(r5));
}
#define SYSCALL_IPC_BROKEN_MODE
#define VDSO_USEFUL
#define VDSO_CGT32_SYM "__vdso_clock_gettime"
#define VDSO_CGT32_VER "LINUX_2.6"
#define VDSO_CGT_SYM "__vdso_clock_gettime64"
#define VDSO_CGT_VER "LINUX_2.6"
#define VDSO_CGT_WORKAROUND 1
#endif // __CCGO__
#define SYSCALL_FADVISE_6_ARG

View file

@ -0,0 +1,164 @@
#define a_cas a_cas
static inline int a_cas(volatile int *p, int t, int s)
#ifndef __CCGO__
{
__asm__ __volatile__ (
"lock ; cmpxchg %3, %1"
: "=a"(t), "=m"(*p) : "a"(t), "r"(s) : "memory" );
return t;
}
#else
;
#endif
#define a_swap a_swap
static inline int a_swap(volatile int *p, int v)
#ifndef __CCGO__
{
__asm__ __volatile__(
"xchg %0, %1"
: "=r"(v), "=m"(*p) : "0"(v) : "memory" );
return v;
}
#else
;
#endif
#define a_fetch_add a_fetch_add
static inline int a_fetch_add(volatile int *p, int v)
#ifndef __CCGO__
{
__asm__ __volatile__(
"lock ; xadd %0, %1"
: "=r"(v), "=m"(*p) : "0"(v) : "memory" );
return v;
}
#else
;
#endif
#define a_and a_and
static inline void a_and(volatile int *p, int v)
#ifndef __CCGO__
{
__asm__ __volatile__(
"lock ; and %1, %0"
: "=m"(*p) : "r"(v) : "memory" );
}
#else
;
#endif
#define a_or a_or
static inline void a_or(volatile int *p, int v)
#ifndef __CCGO__
{
__asm__ __volatile__(
"lock ; or %1, %0"
: "=m"(*p) : "r"(v) : "memory" );
}
#else
;
#endif
#define a_inc a_inc
static inline void a_inc(volatile int *p)
#ifndef __CCGO__
{
__asm__ __volatile__(
"lock ; incl %0"
: "=m"(*p) : "m"(*p) : "memory" );
}
#else
;
#endif
#define a_dec a_dec
static inline void a_dec(volatile int *p)
#ifndef __CCGO__
{
__asm__ __volatile__(
"lock ; decl %0"
: "=m"(*p) : "m"(*p) : "memory" );
}
#else
;
#endif
#define a_store a_store
static inline void a_store(volatile int *p, int x)
#ifndef __CCGO__
{
__asm__ __volatile__(
"mov %1, %0 ; lock ; orl $0,(%%esp)"
: "=m"(*p) : "r"(x) : "memory" );
}
#else
;
#endif
#define a_barrier a_barrier
static inline void a_barrier()
#ifndef __CCGO__
{
__asm__ __volatile__( "" : : : "memory" );
}
#else
;
#endif
#define a_spin a_spin
static inline void a_spin()
#ifndef __CCGO__
{
__asm__ __volatile__( "pause" : : : "memory" );
}
#else
;
#endif
#define a_crash a_crash
static inline void a_crash()
#ifndef __CCGO__
{
__asm__ __volatile__( "hlt" : : : "memory" );
}
#else
;
#endif
#define a_ctz_64 a_ctz_64
static inline int a_ctz_64(uint64_t x)
#ifndef __CCGO__
{
int r;
__asm__( "bsf %1,%0 ; jnz 1f ; bsf %2,%0 ; add $32,%0\n1:"
: "=&r"(r) : "r"((unsigned)x), "r"((unsigned)(x>>32)) );
return r;
}
#else
;
#endif
#define a_ctz_32 a_ctz_32
static inline int a_ctz_32(uint32_t x)
#ifndef __CCGO__
{
int r;
__asm__( "bsf %1,%0" : "=r"(r) : "r"(x) );
return r;
}
#else
;
#endif
#define a_clz_32 a_clz_32
static inline int a_clz_32(uint32_t x)
#ifndef __CCGO__
{
__asm__( "bsr %1,%0 ; xor $31,%0" : "=r"(x) : "r"(x) );
return x;
}
#else
;
#endif

View file

@ -0,0 +1,43 @@
#ifndef __CCGO__
#ifdef __FLT_EVAL_METHOD__
#define FLT_EVAL_METHOD __FLT_EVAL_METHOD__
#else
#define FLT_EVAL_METHOD 2
#endif
#define LDBL_TRUE_MIN 3.6451995318824746025e-4951L
#define LDBL_MIN 3.3621031431120935063e-4932L
#define LDBL_MAX 1.1897314953572317650e+4932L
#define LDBL_EPSILON 1.0842021724855044340e-19L
#define LDBL_MANT_DIG 64
#define LDBL_MIN_EXP (-16381)
#define LDBL_MAX_EXP 16384
#define LDBL_DIG 18
#define LDBL_MIN_10_EXP (-4931)
#define LDBL_MAX_10_EXP 4932
#define DECIMAL_DIG 21
#else // __CCGO__
#define FLT_EVAL_METHOD 0
#define LDBL_TRUE_MIN 4.94065645841246544177e-324L
#define LDBL_MIN 2.22507385850720138309e-308L
#define LDBL_MAX 1.79769313486231570815e+308L
#define LDBL_EPSILON 2.22044604925031308085e-16L
#define LDBL_MANT_DIG 53
#define LDBL_MIN_EXP (-1021)
#define LDBL_MAX_EXP 1024
#define LDBL_DIG 15
#define LDBL_MIN_10_EXP (-307)
#define LDBL_MAX_10_EXP 308
#define DECIMAL_DIG 17
#endif // __CCGO__

View file

@ -0,0 +1,12 @@
static inline uintptr_t __get_tp();
#ifndef __CCGO__
static inline uintptr_t __get_tp()
{
uintptr_t tp;
__asm__ ("movl %%gs:0,%0" : "=r" (tp) );
return tp;
}
#endif
#define MC_PC gregs[REG_EIP]

View file

@ -0,0 +1,106 @@
#ifdef __CCGO__
static __inline long __syscall0(long n);
static __inline long __syscall1(long n, long a1);
static __inline long __syscall2(long n, long a1, long a2);
static __inline long __syscall3(long n, long a1, long a2, long a3);
static __inline long __syscall4(long n, long a1, long a2, long a3, long a4);
static __inline long __syscall5(long n, long a1, long a2, long a3, long a4, long a5);
static __inline long __syscall6(long n, long a1, long a2, long a3, long a4, long a5, long a6);
#define __SYSCALL_LL_E(x) ((int)(x)), ((int)((x)>>32))
#define __SYSCALL_LL_O(x) __SYSCALL_LL_E((x))
#else // __CCGO__
#define __SYSCALL_LL_E(x) \
((union { long long ll; long l[2]; }){ .ll = x }).l[0], \
((union { long long ll; long l[2]; }){ .ll = x }).l[1]
#define __SYSCALL_LL_O(x) __SYSCALL_LL_E((x))
#if SYSCALL_NO_TLS
#define SYSCALL_INSNS "int $128"
#else
#define SYSCALL_INSNS "call *%%gs:16"
#endif
#define SYSCALL_INSNS_12 "xchg %%ebx,%%edx ; " SYSCALL_INSNS " ; xchg %%ebx,%%edx"
#define SYSCALL_INSNS_34 "xchg %%ebx,%%edi ; " SYSCALL_INSNS " ; xchg %%ebx,%%edi"
static inline long __syscall0(long n)
{
unsigned long __ret;
__asm__ __volatile__ (SYSCALL_INSNS : "=a"(__ret) : "a"(n) : "memory");
return __ret;
}
static inline long __syscall1(long n, long a1)
{
unsigned long __ret;
__asm__ __volatile__ (SYSCALL_INSNS_12 : "=a"(__ret) : "a"(n), "d"(a1) : "memory");
return __ret;
}
static inline long __syscall2(long n, long a1, long a2)
{
unsigned long __ret;
__asm__ __volatile__ (SYSCALL_INSNS_12 : "=a"(__ret) : "a"(n), "d"(a1), "c"(a2) : "memory");
return __ret;
}
static inline long __syscall3(long n, long a1, long a2, long a3)
{
unsigned long __ret;
#if !defined(__PIC__) || !defined(BROKEN_EBX_ASM)
__asm__ __volatile__ (SYSCALL_INSNS : "=a"(__ret) : "a"(n), "b"(a1), "c"(a2), "d"(a3) : "memory");
#else
__asm__ __volatile__ (SYSCALL_INSNS_34 : "=a"(__ret) : "a"(n), "D"(a1), "c"(a2), "d"(a3) : "memory");
#endif
return __ret;
}
static inline long __syscall4(long n, long a1, long a2, long a3, long a4)
{
unsigned long __ret;
#if !defined(__PIC__) || !defined(BROKEN_EBX_ASM)
__asm__ __volatile__ (SYSCALL_INSNS : "=a"(__ret) : "a"(n), "b"(a1), "c"(a2), "d"(a3), "S"(a4) : "memory");
#else
__asm__ __volatile__ (SYSCALL_INSNS_34 : "=a"(__ret) : "a"(n), "D"(a1), "c"(a2), "d"(a3), "S"(a4) : "memory");
#endif
return __ret;
}
static inline long __syscall5(long n, long a1, long a2, long a3, long a4, long a5)
{
unsigned long __ret;
#if !defined(__PIC__) || !defined(BROKEN_EBX_ASM)
__asm__ __volatile__ (SYSCALL_INSNS
: "=a"(__ret) : "a"(n), "b"(a1), "c"(a2), "d"(a3), "S"(a4), "D"(a5) : "memory");
#else
__asm__ __volatile__ ("pushl %2 ; push %%ebx ; mov 4(%%esp),%%ebx ; " SYSCALL_INSNS " ; pop %%ebx ; add $4,%%esp"
: "=a"(__ret) : "a"(n), "g"(a1), "c"(a2), "d"(a3), "S"(a4), "D"(a5) : "memory");
#endif
return __ret;
}
static inline long __syscall6(long n, long a1, long a2, long a3, long a4, long a5, long a6)
{
unsigned long __ret;
#if !defined(__PIC__) || !defined(BROKEN_EBX_ASM)
__asm__ __volatile__ ("pushl %7 ; push %%ebp ; mov 4(%%esp),%%ebp ; " SYSCALL_INSNS " ; pop %%ebp ; add $4,%%esp"
: "=a"(__ret) : "a"(n), "b"(a1), "c"(a2), "d"(a3), "S"(a4), "D"(a5), "g"(a6) : "memory");
#else
unsigned long a1a6[2] = { a1, a6 };
__asm__ __volatile__ ("pushl %1 ; push %%ebx ; push %%ebp ; mov 8(%%esp),%%ebx ; mov 4(%%ebx),%%ebp ; mov (%%ebx),%%ebx ; " SYSCALL_INSNS " ; pop %%ebp ; pop %%ebx ; add $4,%%esp"
: "=a"(__ret) : "g"(&a1a6), "a"(n), "c"(a2), "d"(a3), "S"(a4), "D"(a5) : "memory");
#endif
return __ret;
}
#define VDSO_USEFUL
#define VDSO_CGT32_SYM "__vdso_clock_gettime"
#define VDSO_CGT32_VER "LINUX_2.6"
#define VDSO_CGT_SYM "__vdso_clock_gettime64"
#define VDSO_CGT_VER "LINUX_2.6"
#endif // __CCGO__

View file

@ -0,0 +1,39 @@
#ifndef __CCGO__
#define FLT_EVAL_METHOD 0
#define LDBL_TRUE_MIN 6.47517511943802511092443895822764655e-4966L
#define LDBL_MIN 3.36210314311209350626267781732175260e-4932L
#define LDBL_MAX 1.18973149535723176508575932662800702e+4932L
#define LDBL_EPSILON 1.92592994438723585305597794258492732e-34L
#define LDBL_MANT_DIG 113
#define LDBL_MIN_EXP (-16381)
#define LDBL_MAX_EXP 16384
#define LDBL_DIG 33
#define LDBL_MIN_10_EXP (-4931)
#define LDBL_MAX_10_EXP 4932
#define DECIMAL_DIG 36
#else // __CCGO__
#define FLT_EVAL_METHOD 0
#define LDBL_TRUE_MIN 4.94065645841246544177e-324L
#define LDBL_MIN 2.22507385850720138309e-308L
#define LDBL_MAX 1.79769313486231570815e+308L
#define LDBL_EPSILON 2.22044604925031308085e-16L
#define LDBL_MANT_DIG 53
#define LDBL_MIN_EXP (-1021)
#define LDBL_MAX_EXP 1024
#define LDBL_DIG 15
#define LDBL_MIN_10_EXP (-307)
#define LDBL_MAX_10_EXP 308
#define DECIMAL_DIG 17
#endif // __CCGO__

View file

@ -0,0 +1,15 @@
static inline uintptr_t __get_tp();
#ifndef __CCGO__
static inline uintptr_t __get_tp()
{
register uintptr_t tp __asm__("tp");
__asm__ ("" : "=r" (tp) );
return tp;
}
#endif
#define TLS_ABOVE_TP
#define GAP_ABOVE_TP 0
#define DTP_OFFSET 0
#define MC_PC __pc

View file

@ -0,0 +1,149 @@
#define __SYSCALL_LL_E(x) (x)
#define __SYSCALL_LL_O(x) (x)
static __inline long __syscall0(long n);
static __inline long __syscall1(long n, long a1);
static __inline long __syscall2(long n, long a1, long a2);
static __inline long __syscall3(long n, long a1, long a2, long a3);
static __inline long __syscall4(long n, long a1, long a2, long a3, long a4);
static __inline long __syscall5(long n, long a1, long a2, long a3, long a4, long a5);
static __inline long __syscall6(long n, long a1, long a2, long a3, long a4, long a5, long a6);
#ifndef __CCGO__
#define SYSCALL_CLOBBERLIST \
"$t0", "$t1", "$t2", "$t3", \
"$t4", "$t5", "$t6", "$t7", "$t8", "memory"
static inline long __syscall0(long n)
{
register long a7 __asm__("$a7") = n;
register long a0 __asm__("$a0");
__asm__ __volatile__ (
"syscall 0"
: "=r"(a0)
: "r"(a7)
: SYSCALL_CLOBBERLIST);
return a0;
}
static inline long __syscall1(long n, long a)
{
register long a7 __asm__("$a7") = n;
register long a0 __asm__("$a0") = a;
__asm__ __volatile__ (
"syscall 0"
: "+r"(a0)
: "r"(a7)
: SYSCALL_CLOBBERLIST);
return a0;
}
static inline long __syscall2(long n, long a, long b)
{
register long a7 __asm__("$a7") = n;
register long a0 __asm__("$a0") = a;
register long a1 __asm__("$a1") = b;
__asm__ __volatile__ (
"syscall 0"
: "+r"(a0)
: "r"(a7), "r"(a1)
: SYSCALL_CLOBBERLIST);
return a0;
}
static inline long __syscall3(long n, long a, long b, long c)
{
register long a7 __asm__("$a7") = n;
register long a0 __asm__("$a0") = a;
register long a1 __asm__("$a1") = b;
register long a2 __asm__("$a2") = c;
__asm__ __volatile__ (
"syscall 0"
: "+r"(a0)
: "r"(a7), "r"(a1), "r"(a2)
: SYSCALL_CLOBBERLIST);
return a0;
}
static inline long __syscall4(long n, long a, long b, long c, long d)
{
register long a7 __asm__("$a7") = n;
register long a0 __asm__("$a0") = a;
register long a1 __asm__("$a1") = b;
register long a2 __asm__("$a2") = c;
register long a3 __asm__("$a3") = d;
__asm__ __volatile__ (
"syscall 0"
: "+r"(a0)
: "r"(a7), "r"(a1), "r"(a2), "r"(a3)
: SYSCALL_CLOBBERLIST);
return a0;
}
static inline long __syscall5(long n, long a, long b, long c, long d, long e)
{
register long a7 __asm__("$a7") = n;
register long a0 __asm__("$a0") = a;
register long a1 __asm__("$a1") = b;
register long a2 __asm__("$a2") = c;
register long a3 __asm__("$a3") = d;
register long a4 __asm__("$a4") = e;
__asm__ __volatile__ (
"syscall 0"
: "+r"(a0)
: "r"(a7), "r"(a1), "r"(a2), "r"(a3), "r"(a4)
: SYSCALL_CLOBBERLIST);
return a0;
}
static inline long __syscall6(long n, long a, long b, long c, long d, long e, long f)
{
register long a7 __asm__("$a7") = n;
register long a0 __asm__("$a0") = a;
register long a1 __asm__("$a1") = b;
register long a2 __asm__("$a2") = c;
register long a3 __asm__("$a3") = d;
register long a4 __asm__("$a4") = e;
register long a5 __asm__("$a5") = f;
__asm__ __volatile__ (
"syscall 0"
: "+r"(a0)
: "r"(a7), "r"(a1), "r"(a2), "r"(a3), "r"(a4), "r"(a5)
: SYSCALL_CLOBBERLIST);
return a0;
}
static inline long __syscall7(long n, long a, long b, long c, long d, long e, long f, long g)
{
register long a7 __asm__("$a7") = n;
register long a0 __asm__("$a0") = a;
register long a1 __asm__("$a1") = b;
register long a2 __asm__("$a2") = c;
register long a3 __asm__("$a3") = d;
register long a4 __asm__("$a4") = e;
register long a5 __asm__("$a5") = f;
register long a6 __asm__("$a6") = g;
__asm__ __volatile__ (
"syscall 0"
: "+r"(a0)
: "r"(a7), "r"(a1), "r"(a2), "r"(a3), "r"(a4), "r"(a5), "r"(a6)
: SYSCALL_CLOBBERLIST);
return a0;
}
#define VDSO_USEFUL
#define VDSO_CGT_SYM "__vdso_clock_gettime"
#define VDSO_CGT_VER "LINUX_5.10"
#endif // __CCGO__
#define IPC_64 0

View file

@ -0,0 +1,20 @@
static inline uintptr_t __get_tp();
#ifndef __CCGO__
static inline uintptr_t __get_tp()
{
register uintptr_t tp __asm__("r13");
__asm__ ("" : "=r" (tp) );
return tp;
}
#endif
#define TLS_ABOVE_TP
#define GAP_ABOVE_TP 0
#define TP_OFFSET 0x7000
#define DTP_OFFSET 0x8000
// the kernel calls the ip "nip", it's the first saved value after the 32
// GPRs.
#define MC_PC gp_regs[32]

View file

@ -0,0 +1,102 @@
#define __SYSCALL_LL_E(x) (x)
#define __SYSCALL_LL_O(x) (x)
static __inline long __syscall0(long n);
static __inline long __syscall1(long n, long a1);
static __inline long __syscall2(long n, long a1, long a2);
static __inline long __syscall3(long n, long a1, long a2, long a3);
static __inline long __syscall4(long n, long a1, long a2, long a3, long a4);
static __inline long __syscall5(long n, long a1, long a2, long a3, long a4, long a5);
static __inline long __syscall6(long n, long a1, long a2, long a3, long a4, long a5, long a6);
#ifndef __CCGO__
static inline long __syscall0(long n)
{
register long r0 __asm__("r0") = n;
register long r3 __asm__("r3");
__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
: "+r"(r0), "=r"(r3)
:: "memory", "cr0", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12");
return r3;
}
static inline long __syscall1(long n, long a)
{
register long r0 __asm__("r0") = n;
register long r3 __asm__("r3") = a;
__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
: "+r"(r0), "+r"(r3)
:: "memory", "cr0", "r4", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12");
return r3;
}
static inline long __syscall2(long n, long a, long b)
{
register long r0 __asm__("r0") = n;
register long r3 __asm__("r3") = a;
register long r4 __asm__("r4") = b;
__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
: "+r"(r0), "+r"(r3), "+r"(r4)
:: "memory", "cr0", "r5", "r6", "r7", "r8", "r9", "r10", "r11", "r12");
return r3;
}
static inline long __syscall3(long n, long a, long b, long c)
{
register long r0 __asm__("r0") = n;
register long r3 __asm__("r3") = a;
register long r4 __asm__("r4") = b;
register long r5 __asm__("r5") = c;
__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
: "+r"(r0), "+r"(r3), "+r"(r4), "+r"(r5)
:: "memory", "cr0", "r6", "r7", "r8", "r9", "r10", "r11", "r12");
return r3;
}
static inline long __syscall4(long n, long a, long b, long c, long d)
{
register long r0 __asm__("r0") = n;
register long r3 __asm__("r3") = a;
register long r4 __asm__("r4") = b;
register long r5 __asm__("r5") = c;
register long r6 __asm__("r6") = d;
__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
: "+r"(r0), "+r"(r3), "+r"(r4), "+r"(r5), "+r"(r6)
:: "memory", "cr0", "r7", "r8", "r9", "r10", "r11", "r12");
return r3;
}
static inline long __syscall5(long n, long a, long b, long c, long d, long e)
{
register long r0 __asm__("r0") = n;
register long r3 __asm__("r3") = a;
register long r4 __asm__("r4") = b;
register long r5 __asm__("r5") = c;
register long r6 __asm__("r6") = d;
register long r7 __asm__("r7") = e;
__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
: "+r"(r0), "+r"(r3), "+r"(r4), "+r"(r5), "+r"(r6), "+r"(r7)
:: "memory", "cr0", "r8", "r9", "r10", "r11", "r12");
return r3;
}
static inline long __syscall6(long n, long a, long b, long c, long d, long e, long f)
{
register long r0 __asm__("r0") = n;
register long r3 __asm__("r3") = a;
register long r4 __asm__("r4") = b;
register long r5 __asm__("r5") = c;
register long r6 __asm__("r6") = d;
register long r7 __asm__("r7") = e;
register long r8 __asm__("r8") = f;
__asm__ __volatile__("sc ; bns+ 1f ; neg %1, %1 ; 1:"
: "+r"(r0), "+r"(r3), "+r"(r4), "+r"(r5), "+r"(r6), "+r"(r7), "+r"(r8)
:: "memory", "cr0", "r9", "r10", "r11", "r12");
return r3;
}
#define SO_RCVTIMEO_OLD 18
#define SO_SNDTIMEO_OLD 19
#endif // __CCGO__

View file

@ -0,0 +1,39 @@
#ifndef __CCGO__
#define FLT_EVAL_METHOD 0
#define LDBL_TRUE_MIN 6.47517511943802511092443895822764655e-4966L
#define LDBL_MIN 3.36210314311209350626267781732175260e-4932L
#define LDBL_MAX 1.18973149535723176508575932662800702e+4932L
#define LDBL_EPSILON 1.92592994438723585305597794258492732e-34L
#define LDBL_MANT_DIG 113
#define LDBL_MIN_EXP (-16381)
#define LDBL_MAX_EXP 16384
#define LDBL_DIG 33
#define LDBL_MIN_10_EXP (-4931)
#define LDBL_MAX_10_EXP 4932
#define DECIMAL_DIG 36
#else // __CCGO__
#define FLT_EVAL_METHOD 0
#define LDBL_TRUE_MIN 4.94065645841246544177e-324L
#define LDBL_MIN 2.22507385850720138309e-308L
#define LDBL_MAX 1.79769313486231570815e+308L
#define LDBL_EPSILON 2.22044604925031308085e-16L
#define LDBL_MANT_DIG 53
#define LDBL_MIN_EXP (-1021)
#define LDBL_MAX_EXP 1024
#define LDBL_DIG 15
#define LDBL_MIN_10_EXP (-307)
#define LDBL_MAX_10_EXP 308
#define DECIMAL_DIG 17
#endif // __CCGO__

View file

@ -0,0 +1,17 @@
static inline uintptr_t __get_tp();
#ifndef __CCGO__
static inline uintptr_t __get_tp()
{
uintptr_t tp;
__asm__ __volatile__("mv %0, tp" : "=r"(tp));
return tp;
}
#endif
#define TLS_ABOVE_TP
#define GAP_ABOVE_TP 0
#define DTP_OFFSET 0x800
#define MC_PC __gregs[0]

View file

@ -0,0 +1,90 @@
#define __SYSCALL_LL_E(x) (x)
#define __SYSCALL_LL_O(x) (x)
static __inline long __syscall0(long n);
static __inline long __syscall1(long n, long a1);
static __inline long __syscall2(long n, long a1, long a2);
static __inline long __syscall3(long n, long a1, long a2, long a3);
static __inline long __syscall4(long n, long a1, long a2, long a3, long a4);
static __inline long __syscall5(long n, long a1, long a2, long a3, long a4, long a5);
static __inline long __syscall6(long n, long a1, long a2, long a3, long a4, long a5, long a6);
#ifndef __CCGO__
#define __asm_syscall(...) \
__asm__ __volatile__ ("ecall\n\t" \
: "=r"(a0) : __VA_ARGS__ : "memory"); \
return a0; \
static inline long __syscall0(long n)
{
register long a7 __asm__("a7") = n;
register long a0 __asm__("a0");
__asm_syscall("r"(a7))
}
static inline long __syscall1(long n, long a)
{
register long a7 __asm__("a7") = n;
register long a0 __asm__("a0") = a;
__asm_syscall("r"(a7), "0"(a0))
}
static inline long __syscall2(long n, long a, long b)
{
register long a7 __asm__("a7") = n;
register long a0 __asm__("a0") = a;
register long a1 __asm__("a1") = b;
__asm_syscall("r"(a7), "0"(a0), "r"(a1))
}
static inline long __syscall3(long n, long a, long b, long c)
{
register long a7 __asm__("a7") = n;
register long a0 __asm__("a0") = a;
register long a1 __asm__("a1") = b;
register long a2 __asm__("a2") = c;
__asm_syscall("r"(a7), "0"(a0), "r"(a1), "r"(a2))
}
static inline long __syscall4(long n, long a, long b, long c, long d)
{
register long a7 __asm__("a7") = n;
register long a0 __asm__("a0") = a;
register long a1 __asm__("a1") = b;
register long a2 __asm__("a2") = c;
register long a3 __asm__("a3") = d;
__asm_syscall("r"(a7), "0"(a0), "r"(a1), "r"(a2), "r"(a3))
}
static inline long __syscall5(long n, long a, long b, long c, long d, long e)
{
register long a7 __asm__("a7") = n;
register long a0 __asm__("a0") = a;
register long a1 __asm__("a1") = b;
register long a2 __asm__("a2") = c;
register long a3 __asm__("a3") = d;
register long a4 __asm__("a4") = e;
__asm_syscall("r"(a7), "0"(a0), "r"(a1), "r"(a2), "r"(a3), "r"(a4))
}
static inline long __syscall6(long n, long a, long b, long c, long d, long e, long f)
{
register long a7 __asm__("a7") = n;
register long a0 __asm__("a0") = a;
register long a1 __asm__("a1") = b;
register long a2 __asm__("a2") = c;
register long a3 __asm__("a3") = d;
register long a4 __asm__("a4") = e;
register long a5 __asm__("a5") = f;
__asm_syscall("r"(a7), "0"(a0), "r"(a1), "r"(a2), "r"(a3), "r"(a4), "r"(a5))
}
#endif // __CCGO__
#define VDSO_USEFUL
/* We don't have a clock_gettime function.
#define VDSO_CGT_SYM "__vdso_clock_gettime"
#define VDSO_CGT_VER "LINUX_2.6" */
#define IPC_64 0

View file

@ -0,0 +1,39 @@
#ifndef __CCGO__
#define FLT_EVAL_METHOD 0
#define LDBL_TRUE_MIN 6.47517511943802511092443895822764655e-4966L
#define LDBL_MIN 3.36210314311209350626267781732175260e-4932L
#define LDBL_MAX 1.18973149535723176508575932662800702e+4932L
#define LDBL_EPSILON 1.92592994438723585305597794258492732e-34L
#define LDBL_MANT_DIG 113
#define LDBL_MIN_EXP (-16381)
#define LDBL_MAX_EXP 16384
#define LDBL_DIG 33
#define LDBL_MIN_10_EXP (-4931)
#define LDBL_MAX_10_EXP 4932
#define DECIMAL_DIG 36
#else // __CCGO__
#define FLT_EVAL_METHOD 0
#define LDBL_TRUE_MIN 4.94065645841246544177e-324L
#define LDBL_MIN 2.22507385850720138309e-308L
#define LDBL_MAX 1.79769313486231570815e+308L
#define LDBL_EPSILON 2.22044604925031308085e-16L
#define LDBL_MANT_DIG 53
#define LDBL_MIN_EXP (-1021)
#define LDBL_MAX_EXP 1024
#define LDBL_DIG 15
#define LDBL_MIN_10_EXP (-307)
#define LDBL_MAX_10_EXP 308
#define DECIMAL_DIG 17
#endif // __CCGO__

View file

@ -0,0 +1,16 @@
static inline uintptr_t __get_tp();
#ifndef __CCGO__
static inline uintptr_t __get_tp()
{
uintptr_t tp;
__asm__ (
"ear %0, %%a0\n"
"sllg %0, %0, 32\n"
"ear %0, %%a1\n"
: "=r"(tp));
return tp;
}
#endif
#define MC_PC psw.addr

View file

@ -0,0 +1,86 @@
#define __SYSCALL_LL_E(x) (x)
#define __SYSCALL_LL_O(x) (x)
static __inline long __syscall0(long n);
static __inline long __syscall1(long n, long a1);
static __inline long __syscall2(long n, long a1, long a2);
static __inline long __syscall3(long n, long a1, long a2, long a3);
static __inline long __syscall4(long n, long a1, long a2, long a3, long a4);
static __inline long __syscall5(long n, long a1, long a2, long a3, long a4, long a5);
static __inline long __syscall6(long n, long a1, long a2, long a3, long a4, long a5, long a6);
#ifndef __CCGO__
#define __asm_syscall(ret, ...) do { \
__asm__ __volatile__ ("svc 0\n" \
: ret : __VA_ARGS__ : "memory"); \
return r2; \
} while (0)
static inline long __syscall0(long n)
{
register long r1 __asm__("r1") = n;
register long r2 __asm__("r2");
__asm_syscall("=r"(r2), "r"(r1));
}
static inline long __syscall1(long n, long a)
{
register long r1 __asm__("r1") = n;
register long r2 __asm__("r2") = a;
__asm_syscall("+r"(r2), "r"(r1));
}
static inline long __syscall2(long n, long a, long b)
{
register long r1 __asm__("r1") = n;
register long r2 __asm__("r2") = a;
register long r3 __asm__("r3") = b;
__asm_syscall("+r"(r2), "r"(r1), "r"(r3));
}
static inline long __syscall3(long n, long a, long b, long c)
{
register long r1 __asm__("r1") = n;
register long r2 __asm__("r2") = a;
register long r3 __asm__("r3") = b;
register long r4 __asm__("r4") = c;
__asm_syscall("+r"(r2), "r"(r1), "r"(r3), "r"(r4));
}
static inline long __syscall4(long n, long a, long b, long c, long d)
{
register long r1 __asm__("r1") = n;
register long r2 __asm__("r2") = a;
register long r3 __asm__("r3") = b;
register long r4 __asm__("r4") = c;
register long r5 __asm__("r5") = d;
__asm_syscall("+r"(r2), "r"(r1), "r"(r3), "r"(r4), "r"(r5));
}
static inline long __syscall5(long n, long a, long b, long c, long d, long e)
{
register long r1 __asm__("r1") = n;
register long r2 __asm__("r2") = a;
register long r3 __asm__("r3") = b;
register long r4 __asm__("r4") = c;
register long r5 __asm__("r5") = d;
register long r6 __asm__("r6") = e;
__asm_syscall("+r"(r2), "r"(r1), "r"(r3), "r"(r4), "r"(r5), "r"(r6));
}
static inline long __syscall6(long n, long a, long b, long c, long d, long e, long f)
{
if (n == SYS_mmap) return __syscall1(n, (long)(long[]){a,b,c,d,e,f});
register long r1 __asm__("r1") = n;
register long r2 __asm__("r2") = a;
register long r3 __asm__("r3") = b;
register long r4 __asm__("r4") = c;
register long r5 __asm__("r5") = d;
register long r6 __asm__("r6") = e;
register long r7 __asm__("r7") = f;
__asm_syscall("+r"(r2), "r"(r1), "r"(r3), "r"(r4), "r"(r5), "r"(r6), "r"(r7));
}
#endif // __CCGO__

View file

@ -0,0 +1,43 @@
#ifndef __CCGO__
#ifdef __FLT_EVAL_METHOD__
#define FLT_EVAL_METHOD __FLT_EVAL_METHOD__
#else
#define FLT_EVAL_METHOD 0
#endif
#define LDBL_TRUE_MIN 3.6451995318824746025e-4951L
#define LDBL_MIN 3.3621031431120935063e-4932L
#define LDBL_MAX 1.1897314953572317650e+4932L
#define LDBL_EPSILON 1.0842021724855044340e-19L
#define LDBL_MANT_DIG 64
#define LDBL_MIN_EXP (-16381)
#define LDBL_MAX_EXP 16384
#define LDBL_DIG 18
#define LDBL_MIN_10_EXP (-4931)
#define LDBL_MAX_10_EXP 4932
#define DECIMAL_DIG 21
#else // __CCGO__
#define FLT_EVAL_METHOD 0
#define LDBL_TRUE_MIN 4.94065645841246544177e-324L
#define LDBL_MIN 2.22507385850720138309e-308L
#define LDBL_MAX 1.79769313486231570815e+308L
#define LDBL_EPSILON 2.22044604925031308085e-16L
#define LDBL_MANT_DIG 53
#define LDBL_MIN_EXP (-1021)
#define LDBL_MAX_EXP 1024
#define LDBL_DIG 15
#define LDBL_MIN_10_EXP (-307)
#define LDBL_MAX_10_EXP 308
#define DECIMAL_DIG 17
#endif // __CCGO__

View file

@ -0,0 +1,12 @@
static inline uintptr_t __get_tp();
#ifndef __CCGO__
static inline uintptr_t __get_tp()
{
uintptr_t tp;
__asm__ ("mov %%fs:0,%0" : "=r" (tp) );
return tp;
}
#endif
#define MC_PC gregs[REG_RIP]

View file

@ -0,0 +1,82 @@
#define __SYSCALL_LL_E(x) (x)
#define __SYSCALL_LL_O(x) (x)
static __inline long __syscall0(long n);
static __inline long __syscall1(long n, long a1);
static __inline long __syscall2(long n, long a1, long a2);
static __inline long __syscall3(long n, long a1, long a2, long a3);
static __inline long __syscall4(long n, long a1, long a2, long a3, long a4);
static __inline long __syscall5(long n, long a1, long a2, long a3, long a4, long a5);
static __inline long __syscall6(long n, long a1, long a2, long a3, long a4, long a5, long a6);
#ifndef __CCGO__
static __inline long __syscall0(long n)
{
unsigned long ret;
__asm__ __volatile__ ("syscall" : "=a"(ret) : "a"(n) : "rcx", "r11", "memory");
return ret;
}
static __inline long __syscall1(long n, long a1)
{
unsigned long ret;
__asm__ __volatile__ ("syscall" : "=a"(ret) : "a"(n), "D"(a1) : "rcx", "r11", "memory");
return ret;
}
static __inline long __syscall2(long n, long a1, long a2)
{
unsigned long ret;
__asm__ __volatile__ ("syscall" : "=a"(ret) : "a"(n), "D"(a1), "S"(a2)
: "rcx", "r11", "memory");
return ret;
}
static __inline long __syscall3(long n, long a1, long a2, long a3)
{
unsigned long ret;
__asm__ __volatile__ ("syscall" : "=a"(ret) : "a"(n), "D"(a1), "S"(a2),
"d"(a3) : "rcx", "r11", "memory");
return ret;
}
static __inline long __syscall4(long n, long a1, long a2, long a3, long a4)
{
unsigned long ret;
register long r10 __asm__("r10") = a4;
__asm__ __volatile__ ("syscall" : "=a"(ret) : "a"(n), "D"(a1), "S"(a2),
"d"(a3), "r"(r10): "rcx", "r11", "memory");
return ret;
}
static __inline long __syscall5(long n, long a1, long a2, long a3, long a4, long a5)
{
unsigned long ret;
register long r10 __asm__("r10") = a4;
register long r8 __asm__("r8") = a5;
__asm__ __volatile__ ("syscall" : "=a"(ret) : "a"(n), "D"(a1), "S"(a2),
"d"(a3), "r"(r10), "r"(r8) : "rcx", "r11", "memory");
return ret;
}
static __inline long __syscall6(long n, long a1, long a2, long a3, long a4, long a5, long a6)
{
unsigned long ret;
register long r10 __asm__("r10") = a4;
register long r8 __asm__("r8") = a5;
register long r9 __asm__("r9") = a6;
__asm__ __volatile__ ("syscall" : "=a"(ret) : "a"(n), "D"(a1), "S"(a2),
"d"(a3), "r"(r10), "r"(r8), "r"(r9) : "rcx", "r11", "memory");
return ret;
}
#define VDSO_USEFUL
#define VDSO_CGT_SYM "__vdso_clock_gettime"
#define VDSO_CGT_VER "LINUX_2.6"
#define VDSO_GETCPU_SYM "__vdso_getcpu"
#define VDSO_GETCPU_VER "LINUX_2.6"
#endif // __CCGO__
#define IPC_64 0