84 lines
1.8 KiB
Groff
84 lines
1.8 KiB
Groff
.TH "libnvme" 9 "enum nvme_lm_queue_attributes" "March 2025" "API Manual" LINUX
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.SH NAME
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enum nvme_lm_queue_attributes \- I/O Submission and I/O Completion Queue Attributes
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.SH SYNOPSIS
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enum nvme_lm_queue_attributes {
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.br
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.BI " NVME_LM_IOSQPC_MASK"
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,
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.br
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.br
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.BI " NVME_LM_IOSQPC_SHIFT"
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,
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.br
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.br
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.BI " NVME_LM_IOSQPRIO_MASK"
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,
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.br
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.br
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.BI " NVME_LM_IOSQPRIO_SHIFT"
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,
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.br
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.br
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.BI " NVME_LM_IOCQPC_MASK"
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,
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.br
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.br
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.BI " NVME_LM_IOCQPC_SHIFT"
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,
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.br
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.br
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.BI " NVME_LM_IOCQIEN_MASK"
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,
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.br
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.br
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.BI " NVME_LM_IOCQIEN_SHIFT"
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,
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.br
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.br
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.BI " NVME_LM_S0PT_MASK"
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,
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.br
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.br
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.BI " NVME_LM_S0PT_SHIFT"
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,
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.br
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.br
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.BI " NVME_LM_IOCQIV_MASK"
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,
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.br
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.br
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.BI " NVME_LM_IOCQIV_SHIFT"
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};
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.SH Constants
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.IP "NVME_LM_IOSQPC_MASK" 12
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Mask to get the Physically Contiguous (PC) bit for this I/O
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submission queue.
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.IP "NVME_LM_IOSQPC_SHIFT" 12
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Shift to get the PC bit for this I/O submission queue
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.IP "NVME_LM_IOSQPRIO_MASK" 12
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Mask to get the Priority for this I/O submission queue.
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.IP "NVME_LM_IOSQPRIO_SHIFT" 12
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Shift to get the Priority for this I/O submission queue.
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.IP "NVME_LM_IOCQPC_MASK" 12
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Mask to get the Physicaly Contiguous (PC) bit for this I/O
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completion queue.
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.IP "NVME_LM_IOCQPC_SHIFT" 12
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Shift to get the PC bit for this I/O completion queue.
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.IP "NVME_LM_IOCQIEN_MASK" 12
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Mask to get the Interrupts Enabled bit for this I/O completion
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queue
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.IP "NVME_LM_IOCQIEN_SHIFT" 12
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Shift to get the Interrupts Enabled bit for this I/O completion
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.IP "NVME_LM_S0PT_MASK" 12
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Mask to get the value of the Phase Tag bit for Slot 0 of this I/O
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completion queue.
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.IP "NVME_LM_S0PT_SHIFT" 12
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Shift to get the value of the Phase Tag bit for Slot 0 of this I/O
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completion queue.
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.IP "NVME_LM_IOCQIV_MASK" 12
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Mask to get the Interrupt Vector (IV) for this I/O completion
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queue.
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.IP "NVME_LM_IOCQIV_SHIFT" 12
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Shift to get the IV for this I/O completion queue.
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